1. Field of the Invention
The present invention generally relates to a display device, such as a liquid crystal display device or EL (Electro Luminescence) display device, and more particularly to a memory circuit, display circuit, and display device arranged to store a data signal for a pixel, for example.
2. Description of the Related Art
In the liquid crystal display device, a large number of pixels are arrayed in a matrix of rows and columns so as to display an image corresponding to one frame of a video signal input from an external signal source such as a personal computer. The video signal is serial-parallel converted into data signals to be applied as analog drive voltages to the pixels in each row. When the video signal is in digital form, a digital-to-analog converter (DAC) is used to obtain the data signals. These data signals are applied via signal lines to the pixels in each row. A capacitance of each pixel is charged or discharged by the analog drive voltage of the data signal, and holds the drive voltage as a charge until update of the data signal.
The data signal is normally updated for each frame period and then transferred to the pixel via the signal line. Such frequent transfer of the data signal makes it difficult to keep power dissipation low. All the data signals do not need to be transferred to the pixels every frame period, for example, in still image display, or even in moving image display where the luminance of all the pixels is maintained between adjacent frames. Thus, to reduce the frequency of transferring the data signals, a technique has been proposed in which pixel memories for storing drive voltages over a long period of time are added to the pixels so that the data signals can be updated only when there arises the need of changing the luminance or there arises the need of reversing the polarity of the drive voltages without changing the luminance. However, the conventional pixel memory is generally of one bit. Thus, intermediate gradations cannot be obtained for displaying a full-color image.
The intermediate gradations are obtainable if the pixel memory is associated with the following configurations:
(1) Configuring the pixel memory for each pixel to store two or more bits of data and attaching an analog-to-digital converter(ADC) and a DAC to the pixel memory.
(2) Forming each pixel to have two or more subpixels and changing the ratio of the white display area.
(3) Performing time-division modulation on each pixel and changing the rate of the white display period.
It is difficult to realize the configurations (1) and (2) in a small pixel size. With the configuration (3), many problems are encountered in increasing gradations. For instance, flicker is liable to occur. To solve these, the pixel memory is simply configured so that it can hold an analog drive voltage.
In general, it is possible to hold an arbitrary analog drive voltage by the use of a capacitance. In introducing this capacitance into a pixel, there is the need for such a circuit arrangement as outputs an analog drive voltage without canceling charges on the capacitance. With the liquid crystal display device, the application of a voltage of one polarity to the liquid crystal layer over a long period of time causes the quality of the liquid crystal material to suffer. For instance, the resistivity of the liquid crystal material decreases. Thus, polarity inversion driving is required from the point of view of liquid crystal life span. Accordingly, it is desirable to additionally hold a voltage (−Vdata) opposite in polarity to a voltage (+Vdata) of the data signal from the signal line, and apply these voltages alternately to the pixel electrode on successive frames.